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Features
• PowerPC® Single Issue Integer Core • Precise Exception Model • Extensive System Development Support
– On-chip Watchpoints and Breakpoints – Program Flow Tracking – On-chip Emulation (Once) Development Interface • High Performance (Dhrystone 2.1: 52 MIPS at 50 MHz, 3.3V, 1.3 Watts Total Power) • Low Power (< 241 mW at 25 MHz, 2.4V Internal, 3.3V I/O-core, Caches, MMUs, I/O) • MPC8XX PowerPC System Interface, Including a Periodic Interrupt Timer, a Bus Monitor, and Real-time Clocks • Single Issue, 32-bit Version of the Embedded PowerPC Core (Fully Compatible with Book 1 of the PowerPC Architecture Definition) with 32 × 32-bit Fixed Point Registers – Embedded PowerPC Performs Branch Folding, Branch Prediction with www.DataSheet4U.