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AT40K20LV - 5K - 50K Gates Coprocessor FPGA

Download the AT40K20LV datasheet PDF. This datasheet also covers the AT40K05LV variant, as both devices belong to the same 5k - 50k gates coprocessor fpga family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Ultra High Performance.
  • System Speeds to 100 MHz.
  • Array Multipliers > 50 MHz.
  • 10 ns Flexible SRAM.
  • Internal Tri-state Capability in Each Cell.
  • FreeRAM™.
  • Flexible, Single/Dual Port, Synchronous/Asynchronous 10 ns SRAM.
  • 2,048 - 18,432 Bits of Distributed SRAM Independent of Logic Cells.
  • 128 - 384 PCI Compliant I/Os.
  • 3V/5V Capability.
  • Programmable Output Drive.
  • Fast, Flexible Array Access Fa.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (AT40K05LV-ATMEL.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Features • Ultra High Performance – System Speeds to 100 MHz – Array Multipliers > 50 MHz – 10 ns Flexible SRAM – Internal Tri-state Capability in Each Cell • FreeRAM™ – Flexible, Single/Dual Port, Synchronous/Asynchronous 10 ns SRAM – 2,048 - 18,432 Bits of Distributed SRAM Independent of Logic Cells • 128 - 384 PCI Compliant I/Os – 3V/5V Capability – Programmable Output Drive – Fast, Flexible Array Access Facilitates Pin Locking – Pin-compatible with XC4000, XC5200 FPGAs • 8 Global Clocks – Fast, Low Skew Clock Distribution – Programmable Rising/Falling Edge Transitions – Distributed Clock Shutdown Capability for Low Power Management – Global Reset/Asynchronous Reset Options – 4 Additional Dedicated PCI Clocks • Cache Logic® Dynamic Full/Partial Re-configurability In-System – Unlimited R