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Features
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12-bit Resolution 500 Msps Sampling Rate Full Power Input Bandwidth (–3 dB) > 1.5 GHz 1.1 Vpp Analog Input (Differential Only) AC or DC Coupled Analog Input with External Control Differential 100Ω or Single-ended 50Ω PECL/LVDS Compatible Clock Inputs LVDS Output Compatibility (100Ω) 3-wire Serial Bus Programming Interface
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– 16-bit Data, 3-bit Address – Gain (±1.5 dB Full-scale) Digital Control – Offset Digital Control (± 40 LSB) – Standby Mode – Internal Static Built-In Test (BIST) • • • •
Synchronous Reset Input Low Power Consumption: 2.3W Power Supply: 5V (Analog), 3.3V (Digital, Output) EBGA 192 Package
12-bit 500 Msps ADC AT84AS001
Summary
Performances
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Band Flatness (0.
AT84AS001 Datasheet
