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AT94S05AL - Secure 5K - 40K Gates of AT40K FPGA

Features

  • Multichip Module Containing Field Programmable System Level Integrated Circuit (FPSLIC®) and Secure Configuration EEPROM Memory.
  • 512 Kbits to 1 Mbit of Configuration Memory with Security Protection and In-System Programming (ISP).
  • Field Programmable System Level Integrated Circuit (FPSLIC).
  • AT40K SRAM-based FPGA with Embedded High-performance RISC AVR® Core and Extensive Data and Instruction SRAM.
  • 5,000 to 40,000 Gates of Patented SRAM-based AT40K FP.

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Features • Multichip Module Containing Field Programmable System Level Integrated Circuit (FPSLIC®) and Secure Configuration EEPROM Memory • 512 Kbits to 1 Mbit of Configuration Memory with Security Protection and In-System Programming (ISP) • Field Programmable System Level Integrated Circuit (FPSLIC) – AT40K SRAM-based FPGA with Embedded High-performance RISC AVR® Core and Extensive Data and Instruction SRAM • 5,000 to 40,000 Gates of Patented SRAM-based AT40K FPGA with FreeRAM™ – 2 - 18.
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