PC755 Overview
The PC755 and PC745 PowerPC® microprocessors are high-performance, lowpower, 32-bit implementations of the PowerPC Reduced Instruction Set puter (RISC) architecture, especially enhanced for embedded applications. The PC755 and PC745 microprocessors differ only in that the PC755.
PC755 Key Features
- 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz (PC755)
- 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745)
- Selectable Bus Clock (12 CPU Bus Dividers up to 10x)
- PD Typical 6.4W at 400 MHz, Full Operating Conditions
- Nap, Doze and Sleep Modes for Power Savings
- Superscalar (3 Instructions per Clock Cycle) Two Instruction + Branch
- 4 Beta Byte Virtual Memory, 4-GByte of Physical Memory
- 64-bit Data and 32-bit Address Bus Interface
- 32-KB Instruction and Data Cache
- Six Independent Execution Units
PC755 Applications
- HiTCE CBGA according to Atmel standards