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PC755 - 32-bit RISC Microprocessor

General Description

The PC755 and PC745 PowerPC® microprocessors are high-performance, lowpower, 32-bit implementations of the PowerPC Reduced Instruction Set Computer (RISC) architecture, especially enhanced for embedded applications.

Key Features

  • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz (PC755).
  • 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745).
  • 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745).
  • Selectable Bus Clock (12 CPU Bus Dividers up to 10x).
  • PD Typical 6.4W at 400 MHz, Full Operating Conditions.
  • Nap, Doze and Sleep Modes for Power Savings.
  • Superscalar (3 Instructions per Clock Cycle) Two Instruction + Branch.
  • 4 Beta Byte Virtual Memory, 4-GByte of.

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Other Datasheets by Atmel (now Microchip Technology)

Part Number Description
PC745 32-bit RISC Microprocessor

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Features • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz (PC755) • 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) • 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) • Selectable Bus Clock (12 CPU Bus Dividers up to 10x) • PD Typical 6.4W at 400 MHz, Full Operating Conditions • Nap, Doze and Sleep Modes for Power Savings • Superscalar (3 Instructions per Clock Cycle) Two Instruction + Branch • 4 Beta Byte Virtual Memory, 4-GByte of Physical Memory • 64-bit Data and 32-bit Address Bus Interface • 32-KB Instruction and Data Cache • Six Independent Execution Units • Write-back and Write-through Operations • fINT max = 400 MHz (TBC) • fBUS max = 100 MHz • Voltage I/O 2.5V/3.3V; Voltage Int 2.