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SD60C52 - (SD60C32 / SD60C52) CMOS SINGLE-COMPONENT 8-BIT MICROCOMPUTER

Download the SD60C52 datasheet PDF. This datasheet also covers the SD60C32 variant, as both devices belong to the same (sd60c32 / sd60c52) cmos single-component 8-bit microcomputer family and are provided as variant models within a single manufacturer datasheet.

General Description

The AUK 60C32/P 60C52/P is a high-performance micro controller fabricated with AUK high-density CMOS technology.

The AUK CMOS technology combines the high speed and density characteristics of MOS with the low power attributes of CMOS.

Key Features

  • 8-bit CPU optimized for control.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SD60C32_AUK.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number SD60C52
Manufacturer AUK
File Size 112.36 KB
Description (SD60C32 / SD60C52) CMOS SINGLE-COMPONENT 8-BIT MICROCOMPUTER
Datasheet download datasheet SD60C52 Datasheet

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Other Datasheets by AUK

Part Number Description
SD60C52P (SD60C32 / SD60C52) CMOS SINGLE-COMPONENT 8-BIT MICROCOMPUTER
SD60C51 (SD60C31 / SD60C51) CMOS SINGLE-COMPONENT 8-BIT MICROCOMPUTER
SD60C51P (SD60C31 / SD60C51) CMOS SINGLE-COMPONENT 8-BIT MICROCOMPUTER
SD60C31 (SD60C31 / SD60C51) CMOS SINGLE-COMPONENT 8-BIT MICROCOMPUTER
SD60C31P (SD60C31 / SD60C51) CMOS SINGLE-COMPONENT 8-BIT MICROCOMPUTER

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Semiconductor SD60C32/P, SD60C52/P CMOS SINGLE-COMPONENT 8-BIT MICROCOMPUTER Description The AUK 60C32/P 60C52/P is a high-performance micro controller fabricated with AUK high-density CMOS technology. The AUK CMOS technology combines the high speed and density characteristics of MOS with the low power attributes of CMOS. The 60C52 contains a 8K×8 ROM, a 256×8 RAM, 32 I/O lines, three 16bit counter/timers, a six sourc two-priority level nested interrupt structure, a serial I/O port for either multiprocessor communication, I/O expansion or full duplex UART, and on-chip oscillator and clock circuits. In addition, the device has two software selectable modes of power reduction idle mode and power-down mode.