ABX8039 Datasheet | Abracon Corporation

FEATURES - - - Less than 0.4ps RMS (12k Hz-20MHz) phase jitter for all frequencies . Less than 25ps peak to peak jitter for all frequencies. Low phase noise output (@ 1MHz frequency offset ∗ -144d Bc/Hz for 106.25MHz ∗ -144d Bc/Hz for 156.25MHz ∗ -144d Bc/Hz for 212.5MHz ∗ -140d Bc/Hz for 312.5MHz, ∗ -131d BC/Hz for 622.08MHz 19MHz-40MHz crystal input. 38MHz-640MHz output. Available in PECL, LVDS, or CMOS outputs. Output Enable selector. 2.5V & 3.3V operation. Available in 3x3 QFN or 16-pin TSSOP packages. PACKAGE PIN ASSIGNMENT VDDANA XIN XOUT SEL2^ OE_CTRL DNC GNDANA LP 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 SEL0^ SEL1^ GNDBUF QBAR VDDBUF Q GNDBUF LM ABX803X VDDANA SEL0^ DESCRIPTION The ABX803X is a monolithic low jitter and low phase noise high performance clock, capable of maintaining 0.4ps RMS phase jitter and CMOS, LVDS or PECL outputs, covering a wide frequency output range up to 640MHz. It allows high performance and high frequency output, using a low cost fundamental crystal of between 19-40MHz. The frequency selector pads of ABX803X enable output frequencies of (2, 4, 8, or 16) - F XIN . The ABX803X is designed to address the demanding requirements of high performance applications such Fiber Channel, serial ATA, Ethernet, SAN, etc. XOUT SEL2^ OE_CTRL DNC 12 13 14 15 16 1 SEL1^ - - - - - - 16-pin TSSOP 3x3 QFN 8 7 GNDBUF QBAR VDDBUF Q ABX803X 2 3 4 6 5 GNDANA Note1: QBAR is used for single ended CMOS output. Note2: ^ Denotes internal pull up resistor. BLOCK DIAGRAM VCO Divider Charge Pump + Loop Filter Output Divider (1,2,4,8) GNDBUF XIN XOUT XTAL OSC Phase Detector VCO (F Xi N x16) QBAR Q Performance...