M1543C
Overview
- Supports PCI Master and Slave Interface
- Supports PCI Master and Slave Initiated Termination
- Concurrent PCI Architecture
- PCI spec. 2.1 Compliant (Delayed Transaction & Passive Release Support) T Buffers Control
- 8-byte Bi-directional Line Buffers for DMA/ISA Memory Read/Write Cycles to PCI Bus
- 32-bit Posted Write Buffer for PCI Memory Write and I/O Data Write (for Sound Card) to ISA Bus T Provides Steerable PCI Interrupts for PCI device Plug-and-Play
- Up to 8 PCI Interrupts Routing
- Level to Edge Trigger Transfer T Enhanced DMA Controller
- Provides 7 Programmable Channels, 4 for 8-bit Data Size, 3 for 16-bit Data Size
- 32-bit Addressability
