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A3P1000 - Military ProASIC3/EL Low-Power Flash FPGAs

This page provides the datasheet information for the A3P1000, a member of the A3PE600L Military ProASIC3/EL Low-Power Flash FPGAs family.

Datasheet Summary

Description

The military ProASIC3/EL family of Actel flash FPGAs dramatically reduces dynamic power consumption by 40% and static power by 50%.

Features

  • Military Temperature Tested and Qualified.
  • Each Device Tested from.
  • 55°C to 125°C ® Advanced and Pro (Professional) I/Os††.
  • 700 Mbps DDR, LVDS-Capable I/Os 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation† Bank-Selectable I/O Voltages.
  • up to 8 Banks per Chip Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V.

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Datasheet preview – A3P1000

Datasheet Details

Part number A3P1000
Manufacturer Actel Corporation
File Size 5.72 MB
Description Military ProASIC3/EL Low-Power Flash FPGAs
Datasheet download datasheet A3P1000 Datasheet
Additional preview pages of the A3P1000 datasheet.
Other Datasheets by Actel Corporation

Full PDF Text Transcription

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v1.0 Military ProASIC3/EL Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Military Temperature Tested and Qualified • Each Device Tested from –55°C to 125°C ® Advanced and Pro (Professional) I/Os†† • • • • • • • • • • • • • • 700 Mbps DDR, LVDS-Capable I/Os 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation† Bank-Selectable I/O Voltages—up to 8 Banks per Chip Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V / 1.2 V, 3.3 V PCI / 3.3 V PCI-X, and LVCMOS 2.5 V / 5.0 V Input† Differential I/O Standards: LVPECL, LVDS, BLVDS, and M-LVDS Voltage-Referenced I/O Standards: GTL+ 2.5 V / 3.3 V, GTL 2.5 V / 3.
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