AX500 - Axcelerator Family FPGAs

Product Overview

Actel

Part number	AX500
Manufacturer	Actel
File Size	2.40 MB
Description	Axcelerator Family FPGAs
Datasheet	AX500 Datasheet
Additional preview pages of the AX500 datasheet.

Device Architecture 1-1 Programmable Interconnect Element . 1-2 Embedded Memory 1-4 I/O Logic

Voltage-Referenced I/O Standards: GTL+, HSTL Class 1, SSTL2 Class 1 and 2, SSTL3 Class 1 and 2.
Registered I/Os.
Hot-Swap Compliant I/Os (except PCI).
Programmable Slew Rate and Drive Strength on Outputs.
Programmable Delay and Weak Pull-Up/Pull-Down Circuits on Inputs Embedded Memory:.
Variable-Aspect 4,608-bit RAM Blocks (x1, x2, x4, x9,.

📁 Similar Datasheet

AX500 - Dual Channel Digital Motor Controller (Roboteq)
AX50 - Full Wave Rectifying Valve (Philips)
AX50 - Full Wave Gas Filled Rectifying Valve (ETC)
AX5031 - Advanced multi-channel single chip UHF transmitter (AXSEM)
AX5031 - Advanced multi-channel single chip UHF transmitter (ON Semiconductor)
AX5042 - Advanced multi-channel single chip UHF transceiver (AXSEM)
AX50424 - Advanced multi-channel single chip UHF receiver (AXSEM)
AX5043 - Advanced high performance ASK and FSK narrow-band transceiver (AXSEM)

Other Datasheets by Actel

Published: May 5, 2014 |