AM79C970A Datasheet | Advanced Micro Devices

features : - Automatic retransmission with no FIFO reload - Automatic receive stripping and transmit padding (individually programmable) - Automatic runt frame rejection - Automatic selection of received collision frames Microwire EEPROM interface supports jumperless design and provides through-chip programming Advanced Micro Devices Supports optional Boot PROM for diskless node applications Look-Ahead Packet Processing (LAPP) data handling technique reduces system overhead by allowing protocol analysis to begin before end of receive frame Integrated Manchester Encoder/Decoder Provides Integrated Attachment Unit Interface (AUI) and 10BASE-T transceiver with automatic port selection Automatic Twisted-Pair receive polarity detection and automatic correction of the receive polarity Optional byte padding to long-word boundary on receive Dynamic transmit FCS generation programmable on a frame-by-frame basis Internal/external loopback capabilities Supports the following types of network interfaces: - AUI to external 10BASE2, 10BASE5, 10BASE-T or 10BASE-F MAU - Internal 10BASE-T transceiver with Smart Squelch to Twisted-Pair medium JTAG Boundary Scan (IEEE 1149.1) test access port interface and NAND Tree test mode for board-level production connectivity test Supports LANCE General Purpose Serial Interface (GPSI) Supports External Address Detection Interface (EADI) 4 programmable LEDs for status indication 132-pin PQFP package GENERAL DESCRIPTION The 32-bit PCnet-PCI II single-chip full-duplex Ethernet controller is a highly integrated Ethernet system solution designed to address high-performance system application requirements. It is a flexible bus-mastering device that can be used in any application, including networkready PCs, printers, fax modems, and bridge/router designs. The bus-master architecture provides high data throughput in the system and low...