AM8530H
Key Features
- Application notes covering the interfacing of the Am8530H (pre Hstep and CMOS versions only) to the 8086/80186, 68000 processors and Am7960 Data Coded Transceiver have been included. As was the case with the NMOS SCC, some points to look out for when using the Am85C30 are: s Follow the worksheet for initialization (Chapter 7). Unexplainable operations may occur if this procedure is not followed. s Watch out for the Write Recovery time violation. The specification for this (Trc) was changed on both the H-step and CMOS version. It is now referenced from falling edge to falling edge of the Read/Write pulse. Trc is spec’d at 4 PCLKs for the NMOS H-step and 3 PCLKs (best case)/3.5 PCLKs for the Am85C30. s Ensure Mode bits are not changed when writing commands. Each Mode bit affects only one function and a Command bit entry requires a rewrite of the entire register; therefore, care must be taken to insure the integrity of the Mode bits whenever a new command is issued. s Any unused input pins should be tied high.
