GENERAL DESCRIPTION
The bus-master architecture provides high data throughput in the system and low CPU and bus utilization. The PCnet-32 controller is fabricated with AMD’s advanced low-power CMOS process to provide low operating and standby current for power-sensitive applications. Publication# 18219 Rev: D Amendment/0 Issue Date: August 2000 The PCnet-32 controller is a complete Ethernet node integrated into a single VLSI device. It contains a bus interface unit, a DMA buffer management unit, an ISO 8802-3 (IEEE/ANSI 802.3)-defined media access control (MAC) function, individual 136-byte transmit and 128-byte receive FIFOs, an ISO 8802-3 (IEEE/ANSI 802.3)-defined attachment unit interface (AUI) and twisted-pair transceiver medium attachment unit (10BASE-T MAU), and a microwire EEPROM interface. The PCnet-32 controller is also register-compatible with the LANCE (Am7990) Ethernet controller, the CLANCE (Am79C90) Ethernet controller, the ILACC (Am79C900) Ethernet controller, and all Et...
