APL0762.5 Datasheet PDF - Advanced Semiconductor Business PLL Module Specs

APL0762.5 - PLL Module

This page provides the datasheet information for the APL0762.5, a member of the APL07625 PLL Module family.

Datasheet Summary

Description

The plerowTM PLL synthesizer module was designed for use in wireless and wireline systems in a wide range of frequency from 50 MHz to 6 GHz.

ASB’s PLL provides exceptionally low spurious and phase noise performance with fast locking time and low current consumption.

Features

4 dBm Output Level at 762.5 MHz.
Channel Step Size : 10 kHz.
2 nd Harmonic : < -20 dBc.
Spurious Level : < -65 dBc.
Lock Time : < 10 ms.
Current Consumption : < 35 mA Specifications Parameter Frequency Range Output Power Supply Voltage Current Consumption Channel Step Size 2 Harmonics Spurious Level Lock Time Reference Frequency Reference Input Level Phase Noise (C / N) @ 1 kHz @ 10 kHz @ 100 kHz Output Impedance Operating Temp. Range Package Type & Size Ω °C mm.

Datasheet Details

Part number	APL0762.5
Manufacturer	Advanced Semiconductor Business
File Size	109.35 KB
Description	PLL Module
Datasheet	APL0762.5 Datasheet
Additional preview pages of the APL0762.5 datasheet.

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Full PDF Text Transcription

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plerowTM APL0762.5 www.DataSheet4U.com PLL Module Description The plerowTM PLL synthesizer module was designed for use in wireless and wireline systems in a wide range of frequency from 50 MHz to 6 GHz. ASB’s PLL provides exceptionally low spurious and phase noise performance with fast locking time and low current consumption. All products are available in a surface-mount type package. Features · 4 dBm Output Level at 762.

Published: Jun 17, 2009 |