UT54ACS138E Overview
The UT54ACS138E is a 3-line to 8-line decoder/demultiplexer designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. The conditions at the binary select inputs and the three enable inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates of inverters when expanding.
UT54ACS138E Key Features
- 0.6mCRH CMOS process
- Latchup immune
- High speed
- Low power consumption
- Wide power supply operating range of 3.0V to 5.5V
- Available QML Q or V processes
- 16-pin flatpack
- UT54ACS138E
- 5962-96544