UT54ACS165
FEATURES
plementary outputs Direct overriding load (data) inputs Gated clock inputs Parallel-to-serial data conversions 1.2μ CMOS
- Latchup immune High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package
- 16-pin DIP
- 16-lead flatpack UT54ACS165
- SMD 5962-96558 UT54ACTS165
- SMD 5962-96559
DESCRIPTION
The UT54ACS165 and the UT54ACTS165 are 8-bit serial shift registers that, when clocked, shift the data toward serial output QH. Parallelin access to each stage is provided by eight individual data inputs that are enabled by a low level at the SH/LD input. The devices feature a clock inhibit function and a plemented serial output QH .
Clocking is acplished by a low-to-high transition of the CLK input while SH/LD is held high and CLK INH is held low. The functions of the CLK and CLK INH (clock inhibit) inputs are interchangeable. Since a low CLK input and a low-to-high transition of CLK INH will also acplish clocking,...
