UT54ACTS109 Description
The UT54ACS109 and the UT54ACTS109 are dual J-K positive triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the other input levels. When preset and clear are inactive (high), data at the J and K input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse.
UT54ACTS109 Key Features
- radiation-hardened CMOS
- Latchup immune High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package
- 16-pin DIP
- 16-lead flatpack