Datasheet Summary
Standard Products
9-bit Latchable Transceiver with Parity Generator/Checker Datasheet
May 16, 2012 .aeroflex./Logic
Features
Latchable transceiver with output source/sink of 24mA Option to select generate parity and check or "feed-through" data/parity in directions A-to-B or B-to-A Independent latch enable for A-to-B and B-to-A directions Select pin for ODD/EVEN parity ERRA and ERRB output pins for parity checking Ability to simultaneously generate and check parity m mercial CMOS Operational environment:
- Total dose: 100K rad(Si)
- Single Event Latchup immune
- SEU immune Standard Microcircuit Drawing 5962-06240
- QML pliant part Package:
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