FEATURES
Single down/up count control line Look-ahead circuitry enhances speed of cascaded counters Fully synchronous in count modes Asynchronously presettable with load control 1.2μ CMOS - Latchup immune High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package - 16-pin DIP - 16-lead flatpack UT54ACS191 - SMD 5962-96564 UT54ACTS191 - SMD 5962-96565 DESCRIPTION
Synchronous counting operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed. Synchronous operation eliminates the output counting spikes associated with asynchronous counters. A logic one applied to CTEN inhibits counting. The direction of the count is determined by the level of the down/up (D/U) input. When D/U is low, the counter counts up and when D/U is high, it counts down. The counters feature a fully independent clock circuit. Changes at control inputs (CTEN and D/U) that will modify the operating mode have no effect on the contents of the counter until clocking occurs.