ET1011 Datasheet | Agere Systems

Features - Introduction Agere Systems ET1011 is a gigabit Ethernet transceiver fabricated on a single CMOS chip. Packaged in either a 128-pin TQFP or a 68-pin MLCC, the ET1011 is built on 0.13 µm technology for low power consumption and application in server and desktop NIC cards. It features single power supply operation using on-chip regulator controllers. The 10/100/ 1000Base-T device is fully pliant with IEEE® 802.3, 802.3u, and 802.3ab standards. The ET1011 uses an oversampling architecture to gather more signal energy from the munication channel than possible with traditional architectures. The additional signal energy or analog plexity transfers into the digital domain. The result is an analog front end that delivers robust operation, reduced cost, and lower power consumption than traditional architectures. Using oversampling has allowed for the implementation of a fractionally spaced equalizer, which provides better equalization and has greater immunity to timing jitter, resulting in better signal-to-noise ratio (SNR) and thus improved BER. In addition, advanced timing algorithms are used to enable operation over a wider range of cabling plants. .. 10Base-T, 100Base-TX, and 1000Base-T gigabit Ethernet transceiver: - 0.13 µm process - 128-pin TQFP: ❏ RGMII, GMII, MII, RTBI, and TBI interfaces to MAC or switch - 68-pin MLCC: ❏ RGMII and RTBI interfaces to MAC or switch Low power consumption: - Less than 750 m W in 1000Base-T mode - Advanced power management - ACPI pliant wake-on-LAN support Oversampling architecture to improve signal integrity and SNR Optimized, extended performance echo and NEXT filters All digital baseline wander correction Digital PGA control On-chip diagnostic support Automatic speed negotiation Automatic speed downshift Single supply 3.3 V or 2.5 V operation: - On-chip regulator controllers - 3.3 V or 2.5 V digital I/O - 1.0 V core power supplies - 1.8 V or 2.5 V for transformer center tap JTAG - - - - - - - - - - True PHY ET1011...