OR2C12A Overview
Data Sheet June 1999 ORCA® Series 2 Field-Programmable Gate Arrays.
OR2C12A Key Features
- Asynchronous single port: 64 bits/PFU
- Synchronous single port: 64 bits/PFU
- Synchronous dual port: 32 bits/PFU Improved ability to bine PFUs to create larger RAM structures using write-port enable
- 8 x 8 multiplier requires only 16 PFUs
- 30% increase in speed Flip-flop/latch options to allow programmable priority of synchronous set/reset vs. clock enable E
- More I/O per package than the OR2TxxA family
- No dedicated 5 V supply (VDD5)
- Faster configuration speed (40 MHz)
- Pin selectable I/O clamping diodes provide 5V or 3.3V PCI pliance and 5V tolerance
- Full PCI bus pliance in both 5V and 3.3V PCI systems