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6B273 - 8-BIT LATCHED DMOS POWER DRIVER

General Description

Terminal No.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Terminal Name CLEAR Function When (active) LOW, all latches are reset and all outputs go HIGH (turn OFF).

CMOS data input to a latch.

Key Features

  • s 50 V Minimum Output Clamp Voltage s 150 mA Output Current (all outputs simultaneously) s 5 Ω Typical rDS(on) s Low Power Consumption s Replacements for TPIC6B273N and TPIC6B273DW Always order by complete part number: Part Number Package A6B273KA 20-pin DIP A6B273KLW 20-lead SOIC RθJA 55°C/W 70°C/W RθJC 25°C/W 17°C/W 6B273 8-BIT.

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📁 Similar Datasheet

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Other Datasheets by Allegro MicroSystems

Part Number Description
6B273 8-BIT LATCHED DMOS POWER DRIVER
6B259 8-BIT ADDRESSABLE DMOS POWER DRIVER

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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6B273 ADVANCE INFORMATION (Subject to change without notice) January 24, 2000 8-BIT LATCHED DMOS POWER DRIVER The A6B273KA and A6B273KLW combine eight (positive-edgetriggered D-type) data latches and DMOS outputs for systems requiring relatively high load power. Driver applications include relays, solenoids, and other medium-current or high-voltage peripheral power loads. The CMOS inputs and latches allow direct interfacing with microprocessor-based systems. Use with TTL may require appropriate pull-up resistors to ensure an input logic high. The DMOS output inverts the DATA input. All of the output drivers are disabled (the DMOS sink drivers turned OFF) with the CLEAR input low. The A6B273KA/KLW DMOS open-drain outputs are capable of sinking up to 500 mA.