Description
The A6800 and A6801 latched-input BiMOS ICs merge high-current, high-voltage outputs with CMOS logic.
The CMOS input section consists of 4 or 8 data (D type) latches with associated common CLEAR, STROBE, and OUTPUT ENABLE circuitry.
The power outputs are bipolar NPN Darlingtons.
Features
- 3.3 to 5 V logic supply range.
- Up to 10 MHz data input rate.
- High-voltage, high-current outputs.
- Darlington current-sink outputs, with improved low-saturation
voltages.
- CMOS, TTL compatible inputs.
- Output transient protection.
- Internal pull-down resistors.
- Low-power CMOS latches
Packages
A6800 14-pin 7.62 mm DIP
(A package)
A6800 14-pin SOICN
(L package)
A6801 28-pin PLCC (EP package)
Approximate scale 1:1
A6801 24-pin SOICW (LW package).
A6801 Datasheet
