UCN5818AF Datasheet PDF

Allegro MicroSystems UCN5818AF

the UCN5818AF and UCN5818EPF smart power BiMOS II drivers combine CMOS shift registers, data latches, and control circuitry, with bipolar high- SERIAL DATA OUT LOAD SUPPLY LOGIC SUPPLY SERIAL DATA IN 40 OUT3 41 OUT2 42 OUT1 3 OUT32 4 OUT31 5 OUT30 speed sourcing outputs and DMOS active pull-down circuitry. The high- 6 NC LATCHES REGISTER REGISTER LATCHES 2 VBB 1 V DD 44 43 OUT29 7 T 8 9 C 10 U 11 12 D Y 8 13 O L 1 14 R N 68 15 16 P O A OUT19 17 2 OUT 8 39 OUT 4 38 37 36 35 34 1393 32 31 30 OUT13 29 NC NC 18 OUT18 19 OUT17 20 BLANKING 21 BLNK GROUND 22 CLOCK 23 CLK STROBE 24 ST OUT16 25 OUT15 26 OUT14 27 NC 28 D CE t — Dwg.PP-059-2 UE EN en ABSOLUTE MAXIMUM RATINGS m at TA = 25°C IN ER ce Logic Supply Voltage, VDD The UCN5818AF is supplied in a 40-pin plastic dual in-line package with 0.600" (15.24 mm) row spacing.