AS7C34096A Description
The AS7C34096A is a high-performance CMOS 4,194,304-bit Static Random Access Memory (SRAM) device organized as 524,288 words × 8 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired. Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 4/5/6/7 ns are ideal for high-performance applications.
AS7C34096A Key Features
- 10/12/15/20 ns address access time
- 4/5/6/7 ns output enable access time
- 650 mW / max @ 10 ns
- 18 mW / max CMOS
- Equal access and cycle times
- Easy memory expansion with CE, OE inputs
- TTL-patible, three-state I/O
- JEDEC standard packages
- 400 mil 36-pin SOJ
- 44-pin TSOP 2