• Part: AS1C4M16PL-70BIN
  • Description: 64M CellularRAM AD-MUX Low Power PSEUDO SRAM
  • Manufacturer: Alliance Semiconductor
  • Size: 1.63 MB
Download AS1C4M16PL-70BIN Datasheet PDF
Alliance Semiconductor
AS1C4M16PL-70BIN
FEATURES - 16-bit multiplexed address/data bus - Single device supports asynchronous and burst operation - Vcc, Vcc Q voltages: 1.7V-1.95V VCC 1.7V-1.95V VCCQ - Random access time: 70ns - Burst mode READ and WRITE access: 4, 8, 16, or 32 words, or continuous burst Burst wrap or sequential Max clock rate: 108 MHz (t CLK = 9.26ns) , 133MHz(t CLK = 7.5ns) Burst initial latency: 37.0ns (4 clocks) @ 108 MHz , 37.5ns (5 clocks) @ 133 MHz t ACLK: 7ns @ 108 MHz , 5.5ns @ 133 MHz - Low power consumption: Asynchronous READ: <25m A Initial access, burst READ: (37.0ns [4 clocks] @ 108 MHz) <35m A Continuous burst READ: <30m A Initial access, burst READ: (37.5ns [5 clocks] @ 133 MHz) <40m A Continuous burst READ: <35m A Deep power down: < 20u A(max. at 85°C) : < 5u A(Typ.at 25°C) - Low-power features On-chip temperature pensated self refresh (TCSR) Partial array refresh (PAR) Deep Power_down(DPD) mode OPTIONS - Configuration: 64Mb (4 megabit x 16) - Vcc core / Vcc Q I/O voltage supply: 1.8V - Timing:...