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AS4C128M32MD4-062BAN Datasheet PDF

Alliance Semiconductor AS4C128M32MD4-062BAN

The LPDDR4 SDRAM is organized as 1 or 2 channels per device, and individual channel is 8-banks and 16-bits. This product uses a double-data-rate architecture to achieve high-speed operation.
Part No. AS4C128M32MD4-062BAN
Datasheet AS4C128M32MD4-062BAN Download
Manufacturer
Alliance Semiconductor
Description 2Gb/4Gb/8Gb LPDDR4
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AS4C128M32MD4-062BAN datasheet page 1 preview

FEATURES

The 2Gb/4Gb/8Gb LPDDR4 SDRAM offers the following key features:
● Configuration: - x32 for 2-channels per device (AS4C64M32MD4 , AS4C128M32MD4, AS4C256M32MD4) - x16 for 1-channel per device (AS4C128M16MD4, AS4C256M16MD4) - 8 internal banks per each channel
● On-Chip ECC: - Single-bit error correction (per 64-bits), which will maximize reliability - Optional ERR output signal per channel, which indicates ECC event occurrence - ECC Register, which controls ECC function
● Low-voltage Core and I/O Power Supplies: - VDD2 /VDDQ = 1.06-1.17V, VDD1 = 1.70-1.95V
● LVSTL(Low Voltage Swing Terminated Logic) I/O Interface
● Internal VREF and VREF Training
● Dynamic ODT : - DQ ODT :VSSQ Termination - CA ODT :VSS Termination
● Selectable output drive strength (DS)
● Max. Clock Frequency : 1.6GHz (3.2Gbps for one channel)
● 16-bit Pre-fetch DDR data bus
● Single data rate (multiple cycles) command/address bus
● Bidirectional/differential data strobe per byte of data (DQS, DQS)
● DMI pin supp...
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