AS4C64M8D2-25BIN Datasheet PDF - Alliance Semiconductor 512M SDRAM Specs

AS4C64M8D2-25BIN - 512M SDRAM

Datasheet Summary

Features

JEDEC Standard Compliant.
JEDEC standard 1.8V I/O (SSTL_18-compatible).
Power supplies: VDD & VDDQ = +1.8V  0.1V.
Operating temperature: - Commercial (0 ~ 85 °C) - Industrial (-40 ~ 95 °C).
Supports JEDEC clock jitter specification.
Fully synchronous operation.
Fast clock rate: 400 MHz.
Differential Clock, CK & CK#.
Bidirectional single/differential data strobe.
4 internal banks for concurrent operation.
4-bit prefetch a.

Datasheet Details

Part number	AS4C64M8D2-25BIN
Manufacturer	Alliance Semiconductor
File Size	2.48 MB
Description	512M SDRAM
Datasheet	AS4C64M8D2-25BIN Datasheet
Additional preview pages of the AS4C64M8D2-25BIN datasheet.

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Full PDF Text Transcription

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Revision History 512M AS4C64M8D2 60 ball FBGA PACKAGE Revision Rev 1.0 Rev 1.1 Details Preliminary datasheet Adjust the temperature value AS4C64M8D2-25BIN AS4C64M8D2-25BCN Date Feb. 2014 June. 2017 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1 of 60 - Rev.1.1 Jun. 2017 AS4C64M8D2-25BIN AS4C64M8D2-25BCN 512M – (64M x 8 bit) DDRII Synchronous DRAM (SDRAM) Features  JEDEC Standard Compliant  JEDEC standard 1.8V I/O (SSTL_18-compatible)  Power supplies: VDD & VDDQ = +1.8V  0.

Published: Mar 19, 2019 |