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AS7C31025C - 3.3V 128K x 8 CMOS SRAM

Key Features

  • Industrial and commercial temperatures.
  • Organization: 131,072 x 8 bits.
  • High speed - 10 ns address access time - 5 ns output enable access time.
  • Low power consumption via ship deselect.
  • Easy memory expansion with CE, OE inputs.
  • Center power and ground.
  • TTL/LVTTL-compatible, three-state I/O.
  • JEDEC-standard packages Logic block diagram VCC GND A0 A1 A2 A3 A4 A5 A6 A7 A8 Address decoder Sense amp Input buffer 131,072 x 8.

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Datasheet Details

Part number AS7C31025C
Manufacturer Alliance Semiconductor
File Size 118.69 KB
Description 3.3V 128K x 8 CMOS SRAM
Datasheet download datasheet AS7C31025C Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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September 2006 Advance Information AS7C31025C ® 3.