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AS7C33128NTD36A - 3.3V 128K X 32/36 SRAM

Download the AS7C33128NTD36A datasheet PDF. This datasheet also covers the AS7C33128NTD32A variant, as both devices belong to the same 3.3v 128k x 32/36 sram family and are provided as variant models within a single manufacturer datasheet.

General Description

The AS7C33128NTD36A family is a high performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) device organized as 131,072 words × 32 or 36 bits that incorporates a LATE LATE Write.

Key Features

  • Organization: 131,072 words × 32 or 36 bits NTD™1 architecture for efficient bus operation.
  • Fast clock speeds to 166 MHz in LVTTL/LVCMOS.
  • Fast clock to data access: 3.5/4.0/5.0 ns.
  • Fast OE access time: 3.5/4.0/5.0 ns.
  • Fully synchronous operation.
  • Flow-through or pipelined mode.
  • Asynchronous output enable control 1. NTD™ is a trademark of Alliance Semiconductor Corporation. Logic block diagram.
  • Economical 100-pin TQFP packa.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (AS7C33128NTD32A-AllianceSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number AS7C33128NTD36A
Manufacturer Alliance Semiconductor
File Size 161.42 KB
Description 3.3V 128K X 32/36 SRAM
Datasheet download datasheet AS7C33128NTD36A Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
AS7C33128NTD36B (AS7C33128NTD32B / AS7C33128NTD36B) 3.3V 128Kx32/36 Pipelined SRAM Alliance Semiconductor Corporation
AS7C33128NTD32B (AS7C33128NTD32B / AS7C33128NTD36B) 3.3V 128Kx32/36 Pipelined SRAM Alliance Semiconductor Corporation
AS7C33128NTD18B 3.3V 128Kx18 Pipelined SRAM Alliance Semiconductor Corporation
AS7C33128NTF18B 3.3V 128K x 18 Flowthrough Synchronous SRAM Alliance Semiconductor Corporation
AS7C33128NTF32B (AS7C33128NTF32B / AS7C33128NTF36B) 3.3V 128K x 32/36 Flowthrough Synchronous SRAM Alliance Semiconductor Corporation

Other Datasheets by Alliance Semiconductor

Part Number Description
AS7C33128NTD32A 3.3V 128K X 32/36 SRAM
AS7C33256NTD16A 3.3V 256K X 16/18 SRAM
AS7C33256NTD18A 3.3V 256K X 16/18 SRAM
AS7C31024 5V/3.3V 128K x 8 CMOS SRAM
AS7C31024A 5V/3.3V 128K x 8 CMOS SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
December 2002 AS7C33128NTD32A AS7C33128NTD36A Š 9 .î 65$0 ZLWK 17'TM Features • Organization: 131,072 words × 32 or 36 bits NTD™1 architecture for efficient bus operation • Fast clock speeds to 166 MHz in LVTTL/LVCMOS • Fast clock to data access: 3.5/4.0/5.0 ns • Fast OE access time: 3.5/4.0/5.0 ns • Fully synchronous operation • Flow-through or pipelined mode • Asynchronous output enable control 1. NTD™ is a trademark of Alliance Semiconductor Corporation. Logic block diagram • Economical 100-pin TQFP package • Byte write enables • Clock enable for operation hold • Multiple chip enables for easy expansion • 3.3V core power supply • 2.5V or 3.