Part ASM2I99446
Description 2.5V and 3.3V LVCMOS Clock Distribution Buffer
Manufacturer Alliance Semiconductor
Size 569.98 KB
Alliance Semiconductor
ASM2I99446

Overview

  • Configurable 10 outputs LVCMOS clock distribution buffer
  • Compatible to single, dual and mixed 3.3V/2.5V Voltage supply
  • Wide range output clock frequency up to 250MHz
  • Designed for mid-range to high-performance telecom, networking and computer applications
  • Supports applications requiring clock redundancy
  • Max. output skew of 200pS (150pS within one bank)
  • Selectable output configurations per output bank
  • Tristatable outputs
  • 32 lead LQFP & TQFP Packages
  • Ambient operating temperature range of - -40 to 85°C Functional Description The ASM2I99446 is a 2.5V and 3.3V compatible 1:10 clock distribution buffer designed for low-voltage mid-range to high-performance telecom, networking and computing applications. Both 3.3V, 2.5V and dual supply voltages are supported for mixed-voltage applications. The ASM2I99446 offers 10 low-skew outputs and 2 selectable inputs for clock redundancy. The outputs are configurable and support 1:1 and 1:2 output to input frequency ratios. The ASM2I99446 is specified for the extended temperature range of -40°C to 85°C. The ASM2I99446 is a full static fanout buffer design supporting clock frequencies up to 250MHz. The signals are generated and retimed on-chip to ensure minimal skew between the three output banks. Two independent LVCMOS compatible clock inputs are available. This feature supports redundant clock sources or the addition of a test clock into the system design. Each of the three output banks can be individually supplied by 2.5V or 3.3V supporting mixed voltage applications. The FSELx pins choose between division of the input reference frequency by one or two. The frequency divider can be set individually for each of the three output banks. The ASM2I99446 can be reset and the outputs are disabled by deasserting the MR/OE pin (logic high state). Asserting MR/OE will enable the outputs. All inputs accept