Alliance Semiconductor ASM5I23S05A
The ASM5P23S09A has two banks of four outputs each, which can be controlled by the Select inputs as shown in the Select Input Decoding Table. The select input also allows the input clock to be directly applied to the outputs for chip and system testing purposes.| Part No. | ASM5I23S05A |
|---|---|
| Datasheet | ASM5I23S05A Download |
| Manufacturer |  Alliance Semiconductor |
| Description | 3.3V SpreadTrak Zero Delay Buffer |
| Buy | Stock & Price |
GENERAL FEATURES
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● 10 MHz to 133- MHz operating range, compatible with CPU and PCI bus frequencies. Zero input - output propagation delay. Multiple low-skew outputs.
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● ASMP5P23S09A ASMP5P23S05A 133- MHz frequencies, and has higher drive than the -1 devices. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. If all the output clocks are not required, Bank B can be three-stated. Multiple ASM5P23S09A and ASM5P23S05A devices can accept the same input clock and distribute it. In this case the skew between the outputs of the two devices is guaranteed to be less than 700ps. All outputs have less than 200 ps of cycle-to-cycle jitter. 0.35µ CMOS The input and output propagation delay is guaranteed to be less than 250 ps, and the output to output skew is guaranteed to be less than 250ps. The ASM5P23S09A and the ASM5P23S05A are available in two different configurations, as shown in the ordering information table.
