F1C100 Description
F1C100s Datasheet Revision 1.0 Nov.10,2015 Copyright © 2015 Allwinner Technology Co., Ltd. Overview The F1C100s processor represents Allwinner’s latest achievement in mobile applications processors. The processor targets the needs of video boombox markets.
F1C100 Key Features
- Five-stage pipeline architecture
- Support 16KByte D-Cache
- Support 32KByte I-Cache
- Boot ROM
- SD/MMC Interface
- Internal memory
- On-Chip ROM boot loader
- Support system boot from SPI Nor/Nand Flash, and SD/TF card
- Support system code download through USB OTG
- SIP DDR1