Full PDF Text Transcription for EPF6000 (Reference)
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EPF6000. For precise diagrams, and layout, please refer to the original PDF.
www.DataSheet4U.com FLEX 6000 ® Programmable Logic Device Family Data Sheet March 2001, ver. 4.1 Features... s s s Provides an ideal low-cost, programmable alternative to...
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tures... s s s Provides an ideal low-cost, programmable alternative to highvolume gate array applications and allows fast design changes during prototyping or design testing Product features – Register-rich, look-up table- (LUT-) based architecture – OptiFLEX® architecture that increases device area efficiency – Typical gates ranging from 5,000 to 24,000 gates (see Table 1) – Built-in low-skew clock distribution tree – 100% functional testing of all devices; test vectors or scan chains are not required System-level features – In-circuit reconfigurability (ICR) via external configuration device or intelligent controller – 5
EPF6000 Datasheet
