Datasheet Summary
MAX 7000A
®
Includes MAX 7000AE
Programmable Logic Device
Data Sheet
October 2002, ver. 4.3
Features
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High-performance 3.3-V EEPROM-based programmable logic devices (PLDs) built on second-generation Multiple Array MatriX (MAX®) architecture (see Table 1) 3.3-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability
- MAX 7000AE device in-system programmability (ISP) circuitry pliant with IEEE Std. 1532
- EPM7128A and EPM7256A device ISP circuitry patible with IEEE Std. 1532 Built-in boundary-scan test (BST) circuitry pliant with IEEE Std. 1149.1 Supports JEDEC Jam...
