MAX7000A Description
4.5 Includes ® MAX 7000AE MAX 7000A Programmable Logic Device Data Sheet.
MAX7000A Key Features
- High-performance 3.3-V EEPROM-based programmable logic devices (PLDs) built on second-generation Multiple Array MatriX (
- 3.3-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface wit
- MAX 7000AE device in-system programmability (ISP) circuitry pliant with IEEE Std. 1532
- EPM7128A and EPM7256A device ISP circuitry patible with IEEE Std. 1532
- Built-in boundary-scan test (BST) circuitry pliant with IEEE Std. 1149.1
- Supports JEDEC Jam Standard Test and Programming Language (STAPL) JESD-71
- Enhanced ISP features
- Enhanced ISP algorithm for faster programming (excluding EPM7128A and EPM7256A devices)
- ISP_Done bit to ensure plete programming (excluding EPM7128A and EPM7256A devices)
- Pull-up resistor on I/O pins during in-system programming