Description
MAX 7000A Programmable Logic Device Data Sheet
Software design support and automatic place-and-route provided by Altera’s development systems for Windows-based PCs and Sun SPARCstation, and HP 9000 Series 700/800 workstations
Additional design entry and simulation support provided by ED
Features
- f.
- High-performance 3.3-V EEPROM-based programmable logic devices (PLDs) built on second-generation Multiple Array MatriX (MAX®) architecture (see Table 1).
- 3.3-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability.
- MAX 7000AE device in-system programmability (ISP) circuitry compliant with IEEE Std. 1532.
- EPM7128A and EPM7256A device ISP circuitry compatible with IEEE Std.
MAX7000A Datasheet
