EP1K50

Manufacturer: Altera

EP1K50 datasheet by Altera.

This datasheet includes multiple variants, all published together in a single manufacturer document.

EP1K50 Datasheet Details

3.4 ACEX 1K Programmable Logic Device Family ® Data Sheet.

Programmable logic devices (PLDs), providing low cost system-on-a-programmable-chip (SOPC) integration in a single devic
Enhanced embedded array for implementing megafunctions such as efficient memory and specialized logic functions
Dual-port capability with up to 16-bit width per embedded array block (EAB)
Logic array for general logic functions
High density
10,000 to 100,000 typical gates (see Table 1)
Up to 49,152 RAM bits (4,096 bits per EAB, all of which can be used without reducing logic capacity)
Cost-efficient programmable architecture for high-volume

Part Number	Description
EP1K10	Programmable Logic Device
EP1K100	Programmable Logic Device
EP1K30	Programmable Logic Device
EP1800	48-Macrocell EPLD
EP1810	EPLD
EP1810EPLD	COMPLEX-EPLD 48-CELL 20NS PROP DELAY
EP1C12	FPGA
EP1C20	FPGA
EP1C3	FPGA
EP1C4	FPGA