Altera EPM7096
The BitBlasterTM serial download cable, ByteBlasterMVTM parallel port download cable, and MasterBlasterTM serial/universal serial bus (USB) download cable program MAX 7000S devices The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture.| Part No. | EPM7096 |
|---|---|
| Datasheet | EPM7096 Download |
| Manufacturer |  Altera |
| Description | Programmable Logic |
| Buy | Stock & Price |
FEATURES
... f● High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX® architecture
● 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices – ISP circuitry compatible with IEEE Std. 1532
● Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S devices
● Built-in JTAG boundary-scan test (BST) circuitry in MAX 7000S devices with 128 or more macrocells
● Complete EPLD family with logic densities ranging from 600 to 5,000 usable gates (see Tables 1 and 2)
● 5-ns pin-to-pin logic delays with up to 175.4-MHz counter frequencies (including interconnect)
● PCI-compliant devices available For information on in-system programmable 3.3-V MAX 7000A or 2.5-V MAX 7000B devices, see the MAX 7000A Programmable Logic Device Family Data Sheet or the MAX 7000B Programmable Logic Device Family Data Sheet. Table 1. MAX 7000 Device
FEATURES
Feature EPM7032 Usable gat...
