FEATURES
12-bit, 65 MSPS dual ADC Differential input with 100 Ω input impedance Full-scale analog input: 296 mV p-p 170 MHz, 3 dB bandwidth SNR (−9 dBFS): 64 dBFS (70 MHz AIN), 64 dBFS (140 MHz AIN) SFDR (−9 dBFS): 77 dBFS (70 MHz AIN), 73 dBFS (140 MHz AIN) 435 mW per channel Dual parallel output buses Out-of-range indicators Independent clocks Duty cycle stabilizer Twos complement or offset binary data format OTR_A PDWNA CLKA DATA BUS A FUNCTIONAL BLOCK DIAGRAM AD15252 INA LPF OEB_A DFS PDWNB CLKB INB LPF OEB_B DATA BUS B 05154-001 APPLICATIONS
Antijam GPS receivers Wireless and wired broadband communications Communications test equipment OTR_B Figure 1. GENERAL DESCRIPTION
Each input is fully differential, ac-coupled, and terminated in 100 Ω input impedances. The full-scale differential signal input range is 296 mV p-p. Two parallel, 12-bit digital output buses provide data flow from the ADCs. The digital output data is presented in either straight binary or twos complement format. Out-of-range (OTR) signals indicate an overflow condition, which can be used with the most significant bit to determine low or high overflow.
Analog Devices
