• Part: AD1877
  • Description: Single-Supply 16-Bit Stereo ADC
  • Manufacturer: Analog Devices
  • Size: 253.49 KB
Download AD1877 Datasheet PDF
Analog Devices
AD1877
AD1877 is Single-Supply 16-Bit Stereo ADC manufactured by Analog Devices.
a Features Single 5 V Power Supply Single-Ended Dual-Channel Analog Inputs 92 d B (Typ) Dynamic Range 90 d B (Typ) S/(THD+N) 0.006 d B Decimator Passband Ripple Fourth-Order, 64-Times Oversampling ⌺⌬ Modulator Three-Stage, Linear-Phase Decimator 256 ؋ F S or 384 ؋ F S Input Clock Less than 100 ␮W (Typ) Power-Down Mode Input Overrange Indication On-Chip Voltage Reference Flexible Serial Output Interface 28-Lead SOIC Package APPLICATIONS Consumer Digital Audio Receivers Digital Audio Recorders, Including Portables CD-R, DCC, MD and DAT Multimedia and Consumer Electronic Equipment Sampling Music Synthesizers Digital Karaoke Systems LRCK WCLK BCLK DVDD1 DGND1 RDEDGE S/M 384/256 AVDD 1 2 3 4 5 6 7 8 9 Single-Supply 16-Bit ⌺⌬ Stereo ADC AD1877- FUNCTIONAL BLOCK DIAGRAM SERIAL OUTPUT INTERFACE CLOCK DIVIDER 28 27 26 THREE-STAGE FIR DECIMATION FILTER THREE-STAGE FIR DECIMATION FILTER 25 CLKIN TAG SOUT DVDD2 24 DGND2 23 RESET MSBDLY RLJUST AGND VINR CAPR1 CAPR2 AGNDR VREFR 22 21 20 19 18 VINL 10 CAPL1 11 CAPL2 12 AGNDL 13 VREFL 14 SINGLE TO DIFFERENTIAL INPUT CONVERTER SINGLE TO DIFFERENTIAL INPUT CONVERTER 17 16 15 VOLTAGE REFERENCE PRODUCT OVERVIEW The AD1877 is a stereo, 16-bit oversampling ADC based on Sigma Delta (∑∆) technology intended primarily for digital audio bandwidth applications requiring a single 5 V power supply. Each single-ended channel consists of a fourth-order one-bit noise shaping modulator and a digital decimation filter. An onchip voltage reference, stable over temperature and time, defines the full-scale range for both channels. Digital output data from both channels are time-multiplexed to a single, flexible serial interface. The AD1877 accepts a 256 × F S or a 384 × FS input clock (FS is the sampling frequency) and operates in both serial port “master” and “slave” modes. In slave mode, all clocks must be externally derived from a mon source. Input signals are sampled at 64 × FS onto internally buffered...