AD1893
Key Features
- The input word width is 4 to 16 bits for the AD1893
- Shorter input words are automatically zero-filled in the LSBs
- The output word width is 24 bits
- The user can receive as many of the output bits as desired
- Internal arithmetic is performed with 22-bit coefficients and 27-bit accumulation
- The digital samples are processed with unity gain
- Input and output data can be independently right- or left- (with or without a one bit clock delay) justified to the left/right clock edge
- In the right-justified mode, the MSB is delayed 16-bit clock periods from the left/right clock edge transition
- Input and output data can also be independently justified to the word clock rising edge
- The data justification options are encoded on two mode pins for both the input port and the output port
