AD4007
FEATURES
Easy Drive Greatly reduced input kickback Input current reduced to 0.5 μA/MSPS Enhanced acquisition phase, ≥79% of cycle time at 1 MSPS First conversion accurate, no latency or pipeline delay Input span pression for single-supply operation Fast conversion allows low SPI clock rates Input overvoltage clamp protection sinks up to 50 m A SPI-/QSPI-/MICROWIRE-/DSP-patible serial interface
High performance Differential analog input range: ±VREF, VREF from 2.4 V to 5.1 V Throughput: 2 MSPS/1 MSPS/500 k SPS options INL: ±1.0 LSB (±3.8 ppm) maximum Guaranteed 18-bit, no missing codes SNR: 100.5 d B at f IN = 1 k Hz, VREF = 5 V THD:
- 123 d B at f IN = 1 k Hz,
- 100 d B at f IN = 100 k Hz SINAD: 89 d B at f IN = 1 MHz (see Figure 17) Oversampled dynamic range 103.5 d B for OSR = 2 130.5 d B for OSR = 1024
Low power Single 1.8 V supply operation with 1.71 V to 5.5 V logic interface 2.4 m W at 500 k SPS (VDD only) 80 μW at 10 k SPS, 16 m W at 2 MSPS (total power)
10-lead packages: 3 mm × 3 mm LFCSP, 3 mm ×...
