Description
13 DAC Architecture
General 13 Channel Groups 13 A/ B Registers And Gain/Offset Adjustment 14 Load DAC 14 Offset DACs 14 Output Amplifier 15 Transfer Function 15 Reference Selection 15 Calibration 16 Calibration Example 16 Reset Function 16
AD5371
Clear Function 16 Power-Down Mode 17
Features
- 40-channel DAC in 80 Lead LQFP and 100 Ball CSPBGA Guaranteed monotonic to 14 bits Maximum output voltage span of 4 × VREF (20 V) Nominal output voltage range of -4 V to +8 V Multiple, Independent output spans available System calibration function allowing user-programmable offset and gain Channel grouping and addressing features Thermal Monitor Function DSP/microcontroller-compatible serial interface LVDS serial interface 2.5 V to 5.5 V JEDEC-compliant digital levels
DVCC VDD VSS AGND DNGD
40-.
AD5371 Datasheet
