FEATURES
Full 16-bit performance 1 LSB max INL and DNL Output voltage range up to ±14 V On-board reference buffers, eliminating the need for a negative reference Controlled output during power-on Temperature range of −40°C to +85°C/−40°C to +125°C Settling time of 10 µs to 0.003% Clear function to 0 V Asynchronous update of outputs (LDAC pin) Power-on reset Serial data output for daisy chaining Data readback facility FUNCTIONAL BLOCK DIAGRAM VSS VDD DGND AD5570 REFGND R R R POWER-ON RESET 16-BIT DAC VOUT AGND AGNDS R DAC REGISTER REFIN POWER-DOWN CONTROL LOGIC PD 03760-0-001 LDAC SHIFT REGISTER APPLICATIONS
Industrial automation Automatic test equipment Process control Data acquisition systems General-purpose instrumentation SDIN SCLK SYNC SDO CLR Figure 1. GENERAL DESCRIPTION
Integral linearity (INL) and differential nonlinearity (DNL) are accurate to 1 LSB. During power-up (when the supply voltages are changing), VOUT is clamped to 0 V via a low impedance path. The voltage on REFIN is gained up and inverted internally to give the positive and negative reference for the DAC core.
Analog Devices
