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AD5687R - Dual 16-/12-Bit nanoDAC+

This page provides the datasheet information for the AD5687R, a member of the AD5689R Dual 16-/12-Bit nanoDAC+ family.

Description

The AD5689R/AD5687R members of the nanoDAC+™ family are low power, dual, 16-/12-bit buffered voltage output digital-to-analog converters (DACs).

Features

  • High relative accuracy (INL): ±2 LSB maximum at 16 bits Low drift 2.5 V reference: 2 ppm/°C typical Tiny package: 3 mm × 3 mm, 16-lead LFCSP TUE: ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum High drive capability: 20 mA, 0.5 V from supply rails User-selectable gain of 1 or 2 (GAIN pin) Reset to zero scale or midscale (RSTSEL pin) 1.8 V logic compatibility 50 MHz SPI with readback or daisy chain Low glitch: 0.5 nV-sec Low power: 3.3 mW at 3 V 2.7 V to 5.5 V.

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Datasheet preview – AD5687R

Datasheet Details

Part number AD5687R
Manufacturer Analog Devices
File Size 1.02 MB
Description Dual 16-/12-Bit nanoDAC+
Datasheet download datasheet AD5687R Datasheet
Additional preview pages of the AD5687R datasheet.

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Full PDF Text Transcription

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Data Sheet Dual, 16-/12-Bit nanoDAC+ with 2 ppm/°C Reference, SPI Interface AD5689R/AD5687R INTERFACE LOGIC 11256-001 FEATURES High relative accuracy (INL): ±2 LSB maximum at 16 bits Low drift 2.5 V reference: 2 ppm/°C typical Tiny package: 3 mm × 3 mm, 16-lead LFCSP TUE: ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum High drive capability: 20 mA, 0.5 V from supply rails User-selectable gain of 1 or 2 (GAIN pin) Reset to zero scale or midscale (RSTSEL pin) 1.8 V logic compatibility 50 MHz SPI with readback or daisy chain Low glitch: 0.5 nV-sec Low power: 3.3 mW at 3 V 2.7 V to 5.
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