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AD7176-2 - Sigma-Delta ADC

Key Features

  • Fast and flexible output rate.
  • 5 SPS to 250 kSPS Fast settling time.
  • 20 µs Channel scan data rate of 50 kSPS/channel Performance specifications 17 noise free bits at 250 kSPS 20 noise free bits at 2.5 kSPS 22 noise free bits at 5 SPS INL ±2.5 ppm of FSR 85 dB rejection of 50 Hz and 60 Hz with 50 ms settling User-configurable input channels 2 fully differential or 4 pseudo differential Crosspoint multiplexer On-chip 2.5 V reference (drift 2 ppm/°C) Internal oscillator, external crys.

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Full PDF Text Transcription for AD7176-2 (Reference)

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Data Sheet 24-Bit, 250 kSPS Sigma-Delta ADC with 20 µs Settling AD7176-2 FEATURES Fast and flexible output rate—5 SPS to 250 kSPS Fast settling time—20 µs Channel scan da...

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output rate—5 SPS to 250 kSPS Fast settling time—20 µs Channel scan data rate of 50 kSPS/channel Performance specifications 17 noise free bits at 250 kSPS 20 noise free bits at 2.5 kSPS 22 noise free bits at 5 SPS INL ±2.5 ppm of FSR 85 dB rejection of 50 Hz and 60 Hz with 50 ms settling User-configurable input channels 2 fully differential or 4 pseudo differential Crosspoint multiplexer On-chip 2.5 V reference (drift 2 ppm/°C) Internal oscillator, external crystal, or external clock Power supply Single supply: 5 V AVDD1, 2 V to 5 V AVDD2 and IOVDD Optional split supply: AVDD1 and AVSS ± 2.5 V Current: 7.