AD73511
Key Features
- Functional Block Diagram Figure 1 is an overall block diagram of the AD73511. The processor section contains three independent computational units: the ALU, the multiplier/accumulator (MAC) and the shifter. The computational units process 16-bit data directly and have provisions to support multiprecision computations. The ALU performs a standard set of arithmetic and logic operations; division primitives are also supported. The MAC performs single-cycle multiply, multiply/add and multiply/ subtract operations with 40 bits of accumulation. The shifter performs logical and arithmetic shifts, normalization, denormalization and derive exponent operations. The internal result (R) bus connects the computational units so that the output of any unit may be the input of any unit on the next cycle.
