Analog Devices AD7612
The AD7612 is a 16-bit charge redistribution successive approximation register (SAR), architecture analog-to-digital converter (ADC) fabricated on Analog Devices, Inc.’s iCMOS high voltage process. The device is configured through hardware or via a dedicated write only serial configuration port for input range and operating mode. The AD7612 contains a high speed 16-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and both serial and parallel system interface ports.
| Part No. |
AD7612 |
| Datasheet |
AD7612
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| Manufacturer |
 Analog Devices |
| Description |
16-bit charge redistribution successive approximation register |
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FEATURES
Multiple pins/software programmable input ranges: 5 V, 10 V, ±5 V, ±10 V Pins or serial SPI®-compatible input ranges/mode selection Throughput 750 kSPS (warp mode) 600 kSPS (normal mode) 500 kSPS (impulse mode) INL: ±0.75 LSB typical, ±1.5 LSB maximum (±23 ppm of FSR) 16-bit resolution with no missing codes SNR: 92 minimum (5 V) @ 2 kHz, 94 dB typical (±10 V) @ 2 kHz THD: −107 dB typical iCMOS™ process technology 5 V internal reference: typical drift 3 ppm/°C; TEMP output No pipeline delay (SAR architecture) Parallel (16- or 8-bit bus) and serial 5 V/3.3 V interface SPI-/QSPI™-/MICROWIRE™-/DSP-compatible Power dissipation: 190 mW @ 750 kSPS Pb-free, 48-lead LQFP and LFCSP (7 mm × 7 mm) packages AGND AVDD PDREF PDBUF IN+ IN– SWITCHED CAP DAC REF FUNCTIONAL BLOCK DIAGRAM TEMP REFBUFIN REF REFGND VCC VEE DVDD DGND OVDD OGND REF AMP AD7612 SERIAL DATA PORT SERIAL CONFIGURATION 16 PORT D[15:0] SER/PAR BYTESWAP CNVST PD RESET CLOCK CONTROL LOGIC AND CALIBRATION CIRCUITRY PARALLEL INTERFACE OB/2C BUSY RD CS 06265-001 WARP IMPULSE BIPOLAR TEN Figure 1.
