Description
AVDD AVDD
Signal Conditioning ADC AD7710
FUNCTIONAL BLOCK DIAGRAM
DVDD REF REF IN (
) IN (+) VBIAS REF OUT
4.5A
2.5V REFERENCE CHARGE-BALANCING A/D CONVERTER
AIN1(+) AIN1(
) AIN2(+) AIN2(
) AVDD 20A IOUT M U X PGA A = 1
128
AUTO-ZEROED MODULATOR
DIGITAL FILTER
SYNC
CLOCK GENERATION SERIAL INTERFACE CONTROL REGISTER OUTPUT REGISTER
MCLK IN MCLK OUT
AD7710
AGND DGND
VSS
RFS TFS MODE SDATA SCLK DRDY A0
The AD7710 is a complete analog front end
Features
- Charge Balancing ADC 24 Bits No Missing Codes ؎ 0.0015% Nonlinearity Two-Channel Programmable Gain Front End Gains from 1 to 128 Differential Inputs Low-Pass Filter with Programmable Filter Cutoffs Ability to Read/Write Calibration Coefficients Bidirectional Microcontroller Serial Interface Internal/External Reference Option Single or Dual Supply Operation Low Power (25 mW typ) with Power-Down Mode (7 mW typ).