AD7762 Datasheet | Analog Devices

FEATURES 120 d B dynamic range at 78 k Hz output data rate 109 d B dynamic range at 625 k Hz output data rate 112 d B SNR at 78 k Hz output data rate 106 d B SNR at 625 k Hz output data rate 625 k Hz maximum fully filtered output word rate Programmable over-sampling rate (32× to 256×) Fully differential modulator input On-chip differential amplifier for signal buffering Low-pass finite impulse response (FIR) filter with default or user-programmable coefficients Overrange alert bit Digital offset and gain correction registers Filter bypass modes Low power and power-down modes Synchronization of multiple devices via SYNC pin FUNCTIONAL BLOCK DIAGRAM VIN- VIN+ DIFF MULTIBIT Σ-Δ MODULATOR AVDD1 AVDD2 AVDD3 VREF+ BUF RECONSTRUCTION AVDD4 DECAPA/B RBIAS MCLK SYNC RESET CONTROL LOGIC I/O OFFSET AND GAIN REGISTERS PROGRAMMABLE DECIMATION AGND VDRIVE DVDD DGND FIR FILTER ENGINE 05477-001 RD/WR DRDY DB0 TO DB15 APPLICATIONS Data acquisition systems Vibration analysis Instrumentation Figure 1. GENERAL DESCRIPTION The AD7762 is a high performance, 24-bit Σ-Δ analog-todigital converter (ADC). It bines wide input bandwidth and high speed with the benefits of Σ-Δ conversion with a performance of 106 d B SNR at 625 k SPS, making it ideal for high speed data acquisition. Wide dynamic range bined with significantly reduced antialiasing requirements simplify the design process. An integrated buffer to drive the reference, a differential amplifier for signal buffering and level shifting, an overrange flag, internal gain and offset registers, and a low-pass digital FIR filter make the AD7762 a pact, highly integrated data acquisition device requiring minimal peripheral ponent selection. In addition, the device offers programmable decimation rates, and the digital FIR filter can be adjusted if the default characteristics are not appropriate to the application. The AD7762 is ideal for applications demanding high SNR without a plex front end signal processing design. The...